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Galois Tech Talk: Introduction to Logic Synthesis

Galois, Inc
421 SW 6th Ave. Suite 300
Portland, OR 97204, US (map)



Galois is pleased to host the following tech talk. These talks are open to the interested public. Please join us!

Please note the nonstandard day/time!


Introduction to Logic Synthesis


Alan Mishchenko, University of California, Berkeley 


10:30am, Friday 08 October 2010

location: Galois Inc. 421 SW 6th Ave. Suite 300, Portland, OR, USA (3rd floor of the Commonwealth building)


The lecture describes the problems solved by logic synthesis. It presents functional representations and typical computations applied to Boolean networks, such as traversal, windowing, cut computation, simulation, Boolean reasoning. Presented next are And-Inverter Graphs (AIGs) that are increasingly used as a unifying representation for all problems. The lecture is finished by an overview of AIG-based solutions in synthesis, technology mapping, and formal verification. 


Alan Mishchenko graduated from Moscow Institute of Physics and Technology, Moscow, Russia, in 1993, and received his Ph.D. degree from Glushkov Institute of Cybernetics, Kiev, Ukraine, in 1997. He has been a research scientist in the US since 1998.  Currently, Alan is an Associate Researcher at University of California, Berkeley.  His research interests are in developing computationally efficient methods for logic synthesis and verification.